asynchronous circuit

Timed circuit synthesis using implicit methods

The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorporate explicit timing information in the specification. This …

Architectural-Level Synthesis of Asynchronous Systems

Asynchronous circuit design has the potential to produce circuits superior to those of synchronous circuit design. Current synchronous methods of architectural-level synthesis do not exploit properties inherent to asynchronous circuits. This research …

Implicit Methods for Timed Circuit Synthesis

The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorporate explicit timing information in the specification. This …

Specification and Compilation of Timed Systems

This thesis presents a framework for the specification and compilation of modules in a system that uses different synchronization paradigms. These timed systems are described by using timed handshaking expansions (HSE) and a standard hardware …

Average-case optimized technology mapping of one-hot domino circuits

This paper presents a technology mapping technique for optimizing the average-case delay of asynchronous combinational circuits implemented using domino logic and one-hot encoded outputs. The technique minimizes the critical path for common input …

Covering conditions and algorithms for the synthesis of speed-independent circuits

This paper presents theory and algorithms for the synthesis of standard C-implementations of speed-independent circuits. These implementations are block-level circuits which may consist of atomic gates to perform complex functions in order to ensure …

An asynchronous implementation of the maxlist algorithm

We present an efficient asynchronous VLSI architecture for calculating running maximum or minimum values over a sliding window. Running maximums or minimums are very useful for many signal and image processing tasks. Our architecture performs the …

Efficient timing analysis algorithms for timed state space exploration

This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that incorporate explicit timing information in the specification which is …

Computer Aided Synthesis and Verification of Gate-Level Timed Circuits

In recent years, there has been a resurgence of interest in the design of asynchronous circuits due to their ability to eliminate clock skew problems, achieve average case performance, adapt to processing and environmental variations, provide …

Technology mapping of timed circuits

This paper presents an automated procedure for the technology mapping of timed circuits to practical gate libraries. Timed circuits are a class of asynchronous circuits that incorporate explicit timing information in the specification which is used …