Verification of Analog/Mixed-Signal Circuits Using Labeled Hybrid Petri Nets

Scott Little, Nicholas Seegmiller, David Walter, Chris Myers, Tomohiro Yoneda
November 2006
DOI

Abstract

System on a chip design results in the integration of digital, analog, and mixed-signal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of modeling such a heterogeneous set of components. This paper also describes a compiler from VHDL-AMS to LHPNs. To support formal verification, this paper presents an efficient zone-based state space exploration algorithm for LHPNs. This algorithm uses a process known as warping to allow zones to describe continuous variables that may be changing at variable rates. Finally, this paper describes the application of this algorithm to a couple of analog/mixed-signal circuit examples

Type
Conference paper
Publication
2006 IEEE/ACM International Conference on Computer Aided Design
logic design state-space methods mixed analogue-digital integrated circuits formal verification formal methods hybrid Petri nets analog circuit mixed-signal circuit system on a chip design VHDL-AMS zone-based state space exploration circuit simulation labeled hybrid Petri net model space exploration system-on-a-chip petri nets permission circuit automata design methodology
Scott Little
Scott Little
Maxim Integrated, EDA
David Walter
David Walter
Amazon (AWS S3), Senior SDE
Chris Myers
Chris Myers
Department Chair / Professor

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