In recent years, there has been a resurgence of interest in the design of asynchronous circuits due to their ability to eliminate clock skew problems, achieve average case performance, adapt to environmental and processing variations, provide component modularity, and lower system power requirements. There is, however, a widely held belief that asynchronous design is difficult and leads to inefficient and unreliable designs. The goal of this course is to dispel this belief by introducing a systematic approach to the design of asynchronous VLSI systems from a high-level specification to an efficient and reliable circuit implementation. This course will include both hands-on experience with existing CAD tools as well as learn the algorithms within them. Topics will include specification, synthesis, optimization with timing information, performance analysis, and verification.
This is a laboratory class in which groups of students (groups can be of size 3 or 4) design, build, and test a simple computer. The idea is to use your digital design skills from 3700, and your computer architecture knowledge from 3810, and put it all together into an interesting semester-long project. You will receive the design specifications in lecture. You will then interpret the specifications and develop a model of the design using a combination of Verilog and schematics. The model should be simulated. Once validated you will synthesize the design onto the FPGA boards. The design will contain the instruction set design, memory organization, ALU design, control, and input-output design.
This course serves three primary purposes. First, it will familiarize the students with current trends and career opportunities in Computer Engineering through presentations by industry and faculty members. The second aspect of the course is to provide an education and practice on technical writing for engineers. Third, factors that are important in the engineering profession including professionalism, ethics, the impact of engineering in global and societal contexts, lifelong learning, and contemporary issues will be discussed.
This course teaches the fundamental theory and design methods for digital systems. Topics include logic functions minimization, combinational circuit design, synchronous and asynchronous sequential circuit design, state diagrams, Mealy and Moore circuits, state minimization and assignment, basic computer organization, and controller implementation. This course also teaches the use of software tools for design, minimization, simulation, and schematic capture of digital systems. The digital systems that are designed will be implemented using MSI, LSI, and field programmable gate arrays.
With the sequencing of the human genome and the genomes of other organisms, we now have a list of the parts that make up these genetic systems. Using this information, researchers are now able to engineer synthetic genetic circuits for a range of applications in the environmental, medical, and energy domains. Crucial to the success of these efforts is the development of methods and tools for the design of these genetic circuits. While inspiration can be drawn from experiences with electronic design, design with a genetic material poses several challenges. In particular, genetic circuits are composed of very noisy components making their behavior more asynchronous, analog, and stochastic in nature. This course will present recent research into new methods and software tools for the modeling, analysis, and design of genetic circuits that are enabling this exciting new field of synthetic biology. As in the sequencing of the human genome, collaborations between engineers and biologists will be essential to the success of synthetic biology. Therefore, the goal of this course is to facilitate these collaborations by teaching both the biological and engineering principles necessary for such research.
Course topics include modeling concurrent systems, logics for specifying system properties, model checking algorithms, timing verification, probabilistic verification, and hybrid system verification.